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TSMC unveils 1.6nm process technology with backside power delivery (tomshardware.com)

398 points by elorant · 842 days ago · 199 comments on HN

Article summary

TSMC has unveiled its 1.6nm process technology, which features a backside power delivery network (BSPDN) called Super Power Rail. This technology promises to improve performance and reduce power consumption compared to its predecessor, N2P. The new node is expected to commence volume production in the second half of 2026 and will potentially compete with Intel's 14A node. The introduction of backside power delivery is seen as a significant innovation in chip manufacturing.

Main themes

  • TSMC 1.6nm process technology
  • Backside power delivery
  • Chip manufacturing innovations
  • Intel competition
  • Power consumption reduction
  • Performance improvement

What commenters say

  • The introduction of backside power delivery is a significant innovation in chip manufacturing that can improve performance and reduce power consumption.
  • The benefits of backside power delivery are not limited to performance, but also include reduced power consumption, which is crucial for handheld devices.
  • Some commenters argue that the demand for higher resolutions and faster performance is driven by consumer expectations, rather than actual needs, and that this can lead to unnecessary power consumption.
  • Others point out that the manufacturing techniques required for backside power delivery are complex and have only become feasible recently, which is why this technology was not introduced earlier.
  • The use of backside power delivery is seen as a response to Intel's competing technology, and the two companies are expected to continue to innovate and compete in the field of chip manufacturing.
  • Some commenters question the need for such advanced technology, given the current state of device performance and power consumption, and argue that other factors such as cost and accessibility should be considered.
  • The discussion highlights the trade-offs between performance, power consumption, and cost in chip manufacturing, and the need for continued innovation to balance these competing demands.
  • The introduction of backside power delivery is expected to have significant implications for the future of chip manufacturing and the development of new devices and technologies.